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Professor Thierry Tambe (Stanford): “Data Representations for Efficient AI”

April 29 @ 4:30 pm - 5:30 pm

Speaker: Professor Thierry Tambe (Stanford)

Title: “Data Representations for Efficient AI”

Video: TBD

Abstract: The unabated pursuit for omniscient and omnipotent AI is levying hefty latency, memory, and energy taxes across all computing scales. Our research is building a heterogeneity of full-stack solutions to produce breakthrough advances in arithmetic performance and energy efficiency for on-chip AI—with a strong emphasis on memory efficiency. In this talk, I will present a series of silicon-proven (16nm/12nm/7nm) numerical representations for efficient AI—spanning per-tensor and per-vector mixed-precision scaling to block-level adaptive codebook encodings—validated in inference and fine-tuning of generative and agentic AI as well as video diffusion workloads. 
Beyond quantization, we identify 2D Gaussian Splatting (2DGS) as a promising substrate for vision–language alignment. System-wise, we build a scalable 2DGS pipeline with structured initialization, luminance-aware pruning, and batched CUDA kernels, delivering >90× faster fitting and ~97% GPU utilization versus prior implementations. Model-wise, we adapt CLIP to 2DGS via a lightweight splat-aware front end, training only 7% of parameters for 6 epochs to reach competitive zero-shot accuracy with up to 20× compression over pixels. These results position 2DGS as a transferable, bandwidth-efficient representation for edge-cloud multimodal alignment.

Bio:  Thierry Tambe is an Assistant Professor of Electrical Engineering and, by courtesy, of Computer Science at Stanford University. His research focuses on making AI and emerging data-intensive applications run efficiently on domain-specific hardware via algorithm-to-silicon co-design. His work has been recognized through a Google ML and Systems Junior Faculty Award, a NVIDIA Graduate PhD Fellowship, and several distinguished paper awards. Previously, Thierry was a visiting research scientist at NVIDIA and a senior engineer at Intel. He received a PhD in Electrical Engineering from Harvard University.

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